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Instruction Set Overview OpCode Matrix Instruction Details


This instruction set is work in progress and can change anytime.

The opcodes are not set yet and will be added later.

A = A-Register
B = B-Register
X = X-Register
TMP = TMP-Register
SP = Stack-Pointer
SP_L = SP_L-Register
SP_H = SP_H-Register
ZF = Zero flag
NF = Negative flag
CF = Carry flag
VF = Overflow flag

Mnemonics with an asterisk are pseudo-instructions, their mapped instructions can be seen here.

Angle brackets indicate an argument (<arg>). These are not written out in Assembly, but are replaced with their actual values.

A <reg> argument means that you can input the A-, B-, X- or TMP-register there. Other registers are not allowed in this case and may have separate instructions.

ALU instructions

All ALU-operations are performed on the A-register (and the TMP-register as a second operand, if it’s a binary operation).

OpCode mnemonic Instruction Description
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Register, load & store Instructions

OpCode mnemonic Instruction Description
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I/O Instructions

OpCode mnemonic Instruction Description
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System Instructions

OpCode mnemonic Instruction Description
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Branch- and Jump Instructions

The given <addr> is the absolute address to which the computer jumps or branches to.

OpCode mnemonic Instruction Description
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Pseudo-Instructions

Some of the instructions/mnemonics in the upper tables have an asterisk, which means that they are pseudo-instructions. Pseudo-instructions are aren’t hardcoded into the controller and have no dedicated opcode, instead, they use other instructions of the ISA. Their purpose is to make programming more convenient by having to write less or more understandable instructions/code. Here is a list of all pseudo-instructions that were mentioned in the tables above, with their mapped instructions.

mnemonic Instruction Mapped Instruction
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